ilya Гость
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Добавлено: Вт Фев 19 2002 19:05 Заголовок сообщения: Так у меня работает |
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//---------------- PC's internal port addresses --------------------------------------
#define WDATA 0x0378 // PC's internal port address to wrirte out the data byte #define RDATA 0x0379 // PC's internal port address to read in the 4 bit of data byte #define CONTR 0x037A // PC's internal port address to wrirte strobs
//---------------- Controls --------------------------------------------------------- // |C0-LSWR|C1-ALE|C2-RDEN|C3-DSTRB all the pins are inverse #define INIT 0x00 // Init state of control pins #define CLRLSWR 0x01 // LSWR low level #define CLRALE 0x02 // ALE low level #define SETRDEN 0x04 // RDEN high level // use this define in write cycle only #define WCLRDSTRB 0x08 // DSTRB low level (write)
//_________________________________________________ // | // This defines are for read cycle only | // | #define RCLRDSTRB 0x0C // DSTRB low level(read) | #define RSETDSTRB 0x04 // DSTRB hight level(read)| //________________________________________________|
.. ReadByte() { BYTE Result;
__asm { push dx push ax push cx ; put cx to the stack
mov dx ,CONTR ; load CONTROL port address to DX mov al,CLRALE ; load control byte (with ALE = 0) to AL out dx,al ; set the address latch enable to low level(ALE = 0) mov al,INIT ; load control byte (with ALE = 1) to AL out dx,al ; set the address latch enable to low level(ALE = 1)
mov al,SETRDEN ; load control byte (with RDEN = 1) to AL out dx,al ; set the read latch signal to high level(RDEN = 1)
mov al,RCLRDSTRB; load control byte(with DSTRB = 0) to AL out dx,al ; set the data latch signal to low level(DSTRB = 0) mov al,RSETDSTRB; load control byte(with DSTRB = 1) to AL out dx,al ; set the data latch signal to high level(DSTRB = 1)
mov dx, RDATA ; load read DATA port address to DX in al, dx ; take the read value from the port to AL ; AL3 = D0 , AL4 = D1 , AL5 = D2 , AL7 = D3
mov ch,al ; save low 4 bits of read value in CH
mov dx ,CONTR ; load CONTROL port address to DX mov al,INIT ; load control byte (with RDEN = 0) to AL out dx,al ; set the read latch signal to high level(RDEN = 0)
mov dx, RDATA ; load read DATA port address to DX in al, dx ; take the read value from the port to AL ; AL3 = D4 , AL4 = D5 , AL5 = D6 , AL7 = D7
shl ch,1 ; shift left CH 1 time jnc Lab1 and ch,7Fh ; set CH7 to 0 jmp Lab2 Lab1: or ch,80h ; set CH7 to 1 Lab2: mov cl,4 ; load shift counter in CL shr ch,cl ; clear CH4-CH7 mov Result,ch ; load D0-D3 to Result
shl al,1 ; shift left AL 1 time jnc Lab3 and al,7Fh ; set AL7 to 0 jmp Lab4 Lab3: or al,80h ; set AL7 to 1 Lab4: and al, ... |
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